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YDA145
D- 4H
MONAURAL 2.1W Non-Clip DIGITAL AUDIO POWER AMPLIFIER Overview
YDA145 (D-4H) is a digital audio power amplifier IC with maximum output of 2.1W (RL=4)x1ch. YDA145 has a "Pure Pulse Direct Speaker Drive Circuit" which directly drives speakers while reducing distortion of pulse output signal and reducing noise on the signal, and realizes the highest standard low distortion rate characteristics and low noise characteristics among digital amplifier ICs for mobile use. In addition, circuit design with fewer external parts can be made depend on the condition of use because corresponds to filter less. The YDA145 features Yamaha original non-clip output control function which detects output signal clip due to the over level input signal and suppress the output signal clip automatically. Also the non-clip output control function can adapt the output clip caused by power supply voltage down with battery. This is the difference from the traditional AGC (Auto Gain Control) or ALC (Auto Level Control) circuit. YDA145 has the power-down function which can minimize the power consumption in the standby state. As for protection function, overcurrent protection function for speaker output terminal, overtemperatue protection function for inside of the device, and low supply voltage malfunction preventing function are prepared.
Features
Maximum output 2.1 Wx1ch (VDD=5.0V, RL=4, THD+N=10%) 0.75 Wx1ch (VDD=3.6V, RL=8, THD+N=10%) Distortion Rate (THD+N) 0.03 % (VDD=3.6V, RL=8, Po=0.4W, 1kHz) Residual Noise 45Vrms (VDD=3.6V, Av=18dB) www..com Efficiency 84 % (VDD=3.6V, RL=8, Po=600mW) 78 % (VDD=3.6V, RL=8, Po=100mW) S/N Ratio 94dB (VDD=3.6V, Av=18dB) Over-current Protection function Thermal Protection function Low voltage Malfunction Prevention function Pop noise reduction function Power-down control function Power-down High speed Recovery function Package Lead-free 9-ball WLCSP (YDA145-PZ)
YDA145 CATALOG CATALOG No.:LSI-4DA145A30 2007.10
YDA145
Terminal configuration
<9-ball WLCSP Bottom View>
Terminal function
No. Name I/O Protection circuit composition Function A1 A IN+ PN Positive input terminal (differential +) A2 Power VDD Power supply A3 O OUT+ Positive output terminal (differential +) B1 GND AGND GND for analog circuits B2 A VREF PN Analog reference power supply terminal B3 GND PGND GND for output www..com C1 A INPN Negative input terminal (differential -) C2 I CTRL N Power down and Non-clip control terminal C3 O OUTNegative output terminal (differential -) (Note) I: Input terminal O: Output terminal A: Analog terminal When a voltage that is bigger than the AVDD potential is impressed to the terminal of PN (protection circuit is composed of PMOS and NMOS), the leakage current flows through the protection circuit of PMOS.
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YDA145
Block diagram
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YDA145
Description of operating functions
Digital Amplifier Function
YDA145 has digital amplifiers with analog input, PWM pulse output, and maximum output of 2.1W(RL=4)x1ch. Distortion of PWM pulse output signal and noise of the signal is reduced by adopting "Pure Pulse Direct Speaker Drive Circuit". In addition, YDA145 has been designed so that high-efficiency can be maintained within an average power range (100mW or so) that is used for mobile terminal. Analog signal input For a differential input, input signals to IN+ and IN- pins via DC-cut capacitors (CIN). The input signal gain is +18dB*1). And, with an input impedance of 28.5k (typ.), a lower cut-off frequency of an input signal becomes 169Hz at CIN=33nF. For a single-ended input, input a signal to IN+ via a DC-cut capacitor (CIN). At this time, IN- pin should be connected to AVSS via a DC-cut capacitor (CIN) with the same capacitance. Gain and a lower Cut-off frequency are the same as the above case. In addition, the output impedance (Zout) of the former source circuit, including signal paths up to INL+ terminal and INterminal should be designed to become 600 or lower*1).

Use a capacitance of 0.1F or less as a DC-cut capacitor (CIN) to reduce pop noise. *1) By limiting supply www..com voltage VDD, operating ambient temperature Ta, DC-cut capacitor CIN, and power-down setting timeTPD, gain can be set by the control of the input resistance. For details, please contact us.
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YDA145
Non-Clip control Function
This is the function to control the output in order to obtain a maximum output level without distortion when an excessive input which causes clipping at the differential signal output is applied. That is, with the Non-Clip function, YDA145 lowers the Gain of the digital amplifier to an appropriate value so as not to cause the clipping at the differential signal output. And, YDA145 follows also to the clip of the output wave form due to the decrease in the power-supply voltage.

The attack time and the release time of Non-Clip control are fixation two levels, and selects with the CTRL terminal. The Attack time is a time interval until gain falls to target attenuation gain -3dB with a big signal input enough. www..com And, the Release Time is a time from target attenuation gain to not working of Non-Clip.
Attack time and Release time Non-Clip mode 1(Recommendation) 2 Attack time 45ms 10ms Release time 2.6s 1.2s
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Protection Function
YDA145 has the following protection functions for the digital amplifier: Over-current Protection function, Thermal Protection function, and Low voltage Malfunction Prevention function. Over-current Protection function This is the function to establish the over-current protection mode when detecting a short circuit between YDA145 differential output terminal and VSS, VDD, or another differential output. In the over current protection mode, the differential output terminal becomes a high impedance state. The over current protection mode can be cancelled by power down or turning on the power again. Thermal Protection function This is the function to establish the thermal protection mode when detecting excessive high temperature of YDA145 itself. In the thermal protection mode, the differential output terminal becomes Weak Low state (a state grounded through high resistivity). And, when YDA145 gets out of such condition, the protection mode is cancelled. Low voltage Malfunction Prevention function This is the function to establish the low voltage protection mode when VDD terminal voltage becomes lower than the detection voltage (VUVLL) for the low voltage malfunction prevention and to cancel the protection mode when VDD terminal voltage becomes higher than the threshold voltage (VUVLH) and by return procedure from power down for its deactivation. (In sag state, this function works, and YDA145 becomes a low voltage protection mode. In the low voltage protection mode, the differential output pin becomes Weak Low state (a state grounded through high resistivity). YDA145 will start up within the start-up time (TSTUP) when the low voltage protection mode is cancelled.
Control Function
VREF terminal output The voltage of VDD/2 is output from the VREF terminal. Capacitor (1F) is connected between the VREF terminal and GND for stabilization. Power down and Initialization function When CTRL terminal is connected to GND potential, the IC goes to the power-down mode. In the mode, all the circuit functions stop and its current consumption becomes the lowest. And, the output terminals become Weak Low (A high resistance grounded state). When in the power-down mode, the level of the terminal must not be changed from GND level during tPD. www..com On the contrary, when CTRL terminal is set to H level, the power-down mode is canceled and the IC starts up after startup time (tSTUP). Caution Please start up the former source circuit first to stabilize the DC bias point (See Figure1-) and then cancel the power-down state of YDA145. The time (TDLY) required to stabilize the voltage can be found by the formula (See (1) shown below). And, signal variation in the former source circuit should be a value lower than PVDD.
Figure 1
Circuit Diagram (1)
TDLY C IN x 330 x 10 3 x 3
Example) TDLY 33 [msec]
(CIN = 0.033 [F])
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In order to return from the power-down mode a desired mode needs to be set after setting both CTRL1 and CTRL2 to H level during tWK. In addition, at startup, cancel the power-down mode after supply voltages has been sufficiently stabilized.
CTRL terminal function By connection external resistors (Rctrl1, Rctrl2, and Rctrl3: Accuracy of 1%) to CTRL terminal, and impression setting threshold voltage of each mode to CTRL terminal, the followings can be set: Non-Clip1, Non-Clip2, Non-Clip OFF, and power-down mode. When turning on the supply voltage or cancelling the power-down mode, control the CTRL terminal according to procedure for cancelling power-down (See Page 6.). A pulse shorter than tPD must not be input. Connect the terminal to the ground through a capacitor Cctrl (a ceramic capacitor of 0.1F or more).
1.8V5.0V CTRL1 Micro computer Rctrl 1
CTRL CTRL2 Rctrl 2 Cctrl 0.1F
CTRL1 H H GND GND
CTRL2 H GND H GND
Function Non-Clip 1 mode Non-Clip 2 mode Non-Clip Off mode Power-down mode
Rctrl3
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"H" level indicates a microcomputer's I/O port H level output voltage that is input to CTRL1 and CTRL2 terminals and GND indicates GND of the microcomputer. GND level of the microcomputer must be the same as that of YDA145. The control of CTRL terminal is based on I/O port H level output voltage of microcomputer that is connected. Set resistance constants according to I/O port H level output voltage of each microcomputer as shown below.
I/O port H level output voltage of microcomputer Rctrl 1 Rctrl 2 Rctrl 3 1.8V 27k 56k 82k 2.6V 33k 68k 27k 3.0V 33k 68k 22k 3.3V 33k 68k 18k 5.0V 56k 120k 15k
Functions of CTRL pin are designed with their control by two control pins (CTRL1 and CTRL2). Only a switching control between Non-Clip1 mode and Power-down mode is available when a single control terminal is used. A setting voltage should be set according to VMOD1 and VMOD4, and use a RC filter with time constant of 1msec or more in order to eliminate noise at transmission side such as Micon etc. (Example. Rctrl=10k and Cctrl=0.1F).
1.8V5.0V CTRL1 Micro computer Rctrl CTRL 10k Cctrl 0.1F
CTRL1 H GND
Function Non-Clip 1 mode Power-down mode
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Pop noise reduction function
The Pop Noise Reduction Function works in the cases of Power-on, Power-off, Power-down on, and Power-down off. And, the pop-noise can be suppressed according to control the power down by the following procedure. Power down mode is cancelled after power-on and the power supply is stabilized enough. Power down mode is set before Power-off.
Snubber Circuit and schottky barrier diode
It is necessary to connect the snubber circuit and schottky barrier diode with the output terminal to prevent IC destruction by the output short-circuit when using it on the following conditions. The constant and the circuit are as follows.
Power supply voltage range 2.7VVDD4.5V 4.5VVDD5.25V Load conditions Wiring inductance4H Snubber Circuit Between OUT+ and OUTRs=1.5, Cs=330pF Between OUT+ and OUTRs=1.5, Cs=680pF Schottky barrier diode Need less Between OUT* and VDD
Wiring inductance and wiring length: about 1H/1m
Recommended parts Schottky barrier diode: ROHM, RB161VA-20(or ROHM RB550VA-30) Forward current surge peak = 5A or more, Average forward current = 1A or more, Forward voltage (IF=1A) = 0.38V or less
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Application circuit examples
C1 1.0F
Input terminal
CIN 33nF 33nF CIN
IN+ Input Buffer Digital Modulator Output Buffer
VDD
YDA145
OUT+
IN-
OUT-
Rctrl1 CTRL1 CTRL
Non-Clip Controller
PGND
CTRL2 Rctrl2 Cctrl Rctrl3 0.1uF C2 1.0uF VREF
Shutdown Control AGND
Use a capacitance of 0.1F or less (e.g. 33nF), 10% as a DC-cut capacitor (CIN) to reduce pop noise. Explanation of the capacitance (C1) between VDD and GND: Use the capacitor (1F or more) with low enough ESR (Equivalent Series Resistance). When it is used at RL=4 or a supply voltage of more than 4.5V, another capacitor (10F or more) with low enough ESR (Equivalent Series Resistance) should be added to use. In addition, place the capacitor as close as possible within 3mm from the IC.
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Cautions for Safety
Please observe the following restrictions to use YDA145 safely and obtain an enough analog characteristic. The snubber circuit should be laid out within 3mm from the IC on the component side. The schottky barrier diode and bypass capacitor which is connected between VDD and GND should be laid out within 3mm from the IC. Bypass capacitor which is connected between PVDD and GND: Use the capacitor (1F or more) with enough low ESR (Equivalent Series Resistance). When it is used at less than 8 or a supply voltage of more than 4.5V, another capacitor (10F or more) with low enough ESR (Equivalent Series Resistance) should be added to use. In addition, place the capacitor as close as possible within 3mm from the IC. When a LC filter is used, consider the following. With a system of which an input signal in excess of a resonance frequency of a LC filter could be input, be sure to place a snubber circuit (insert 15+470nF at the LC filter output) after the LC filter to prevent an over-current condition. The purpose is to prevent an over-current from flowing because an impedance of the speaker increases at the resonance frequency. (The inserted snubber circuit constant might be different according to the impedance frequency characteristics of the speaker. The snubber circuit constant of the description is confirmed with the speaker of the following characteristic. Therefore, when the speaker of frequency characteristics different from the following is used, an enough evaluation is necessary.)
Frequency characteristics of speaker used for measurement 100 3.2 6.4
Impedance[]
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1 10 100 1000 Frequency[Hz] 10000 100000
With a system of which a voltage at an input pin might exceed a supply voltage of VDD/GND, use an external diode etc. to assure that the voltage does not exceed the absolute maximum rating.
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Electrical Characteristic
Absolute Maximum Ratings*1)
Item Symbol Min. Max. Unit Power supply terminal voltage range VDD 0.3 6.0 V Input terminal voltage range (Analog input terminal: IN+, IN-) VIN VSS0.6 VDD0.6 V Input terminal voltage range (Input terminals except IN+, IN-) VIN VSS0.3 VDD0.3 V Allowable dissipation (Ta=25) *2) PD25 1.67 W Allowable dissipation (Ta=85) *2) PD85 0.67 W Junction Temperature TJMAX 125 Storage Temperature TSTG 50 125 Note) *1:Absolute Maximum Ratings is values which must not be exceeded to guarantee device reliability and life, and when using a device in excess even a moment, it may immediately cause damage to device or may significantly deteriorate its reliability With a system of which a voltage at an input pin might exceed a supply voltage of VDD/GND, use an external diode etc. to assure that the voltage does not exceed the absolute maximum rating. *2:ja=60.0/W, Conditions: YDA145 Evaluation board (4 layers), dead calm
Recommended Operating Condition
Item Power Supply Voltage Operating Ambient Temperature Symbol VDD Ta tPD (Min.)=50ms tPD (Min.)=80ms Conditions Min. 2.7 20 30 4 Typ. 3.6 25 Max. 5.25 85 Unit V
Speaker Impedance RL Note) Do not use under a condition other than the recommended operating conditions. The rising time of VDD should be more than 1. Please note not falling below than the power supply shut-down threshold voltage.
DC Characteristics (VSS=0V, VDD=2.7V to 5.25V, Ta=30C to 85C, unless otherwise specified)
Item Power supply start-up threshold voltage Power supply shut-down threshold voltage Non-Clip 1 mode setting threshold voltage Non-Clip 2 mode www..com setting threshold voltage Non-Clip Off mode setting threshold voltage Power-down mode setting threshold voltage Consumption current Consumption current in power-down mode VREF voltage Symbol VUVLH VUVLL VMOD1 VMOD2 VMOD3 VMOD4 IDD IPD VREF Conditions Min. Typ. 2.2 2.0 Max. Unit V V V V V V mA A V
1.20 0.80 0.36 VSS VDD=3.6V, no load, no signal input CTRL=VSS,Ta=25 4.0 0.1 VDD/2
VDD 1.10 0.68 0.14
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YDA145
AC characteristics (VSS=0V, VDD=2.7V to 5.25V, Ta=30C to 85C, unless otherwise specified)
Item Start-up time (Power-down release) Input cut-off frequency Attack time 1 Release time 1 Attack time 2 Release time 2 Wake-up mode setting time Power down setting time Each mode setting time (Except power down) Carrier clock frequency Symbol tSTUP fC tAT1 tRL1 tAT2 tRL2 tWK tPD tMOD fPWM Conditions CIN=33nF, Av=18dB VDD=3.6V, g=10dB VDD=3.6V, g=10dB VDD=3.6V, g=10dB VDD=3.6V, g=10dB Ta(Min.)=-20 Ta(Min.)=-30 6 50 80 0.1 1.0 Min. Typ. 3.5 169 45 2.6 10 1.2 Max. Unit ms Hz ms s ms s ms ms ms MHz
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Analog Characteristics
(VSS=0V, VDD =3.6V, Av=18dB, Ta=25C, CIN=33nF, Non-Clip Off, no snubber circuit, no schottky barrier diode, unless otherwise specified) Item Maximum output Total Harmonic Distortion Rate (BW:20kHz) Residual Noise (BW:20kHz A-Filter) Signal /Noise Ratio (BW:20kHz A-Filter) Power supply rejection ratio Maximum Efficiency Symbol PO THD+N N SNR PSRR Conditions RL=4, VDD=5V RL=8 f=1kHz, THD+N=10% Min. Typ. 2.1 0.75 0.03 0.03 45 94 75 84 78 Max. Unit W W % % Vrms dB dB % % mV dB dB
RL=4, PO=0.65W, f=1kHz RL=8, PO=0.4W, f=1kHz Av=18dB Av=18dB 217Hz RL=8, PO=0.6W RL=8, PO=0.1W
Output offset voltage Vo 20 Frequency characteristics fRES CIN =0.1F, f=100Hz to 20Hz 3 1 Non-Clip Aa 10 maximum attenuation gain Note) All the values of analog characteristics were obtained by using our evaluation circumstance. Depending upon parts and pattern layout to use, characteristics may be changed. 8 or 4 resistor and 30H coil are used as an output load in order to obtain various digital amplifier characteristics.
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YDA145
Typical characteristics examples
VDD=5V: Gain=18dB, Snubber circuit and schottky barrier diode are added. VDD=3.6V: Gain=18dB, no Snubber circuit, no schottky barrier diode. (VSS=0V, Ta=25C, Non-Clip Off, CIN=33nF, unless otherwise specified)
Output vs THD+N VDD=5.0 RL=4+30H 100 10 THD+N [%]
THD+N [%] 100 10 1 0.1 0.01 0.001 Output vs THD+N VDD=5.0 RL=8+30H
1 0.1 0.01 0.001 0.01
0.1 Output[W]
1
10
0.01
0.1 Output[W]
1
10
Output vs THD+N VDD=3.6 RL=4+30H 100 10
THD+N [%] 100 10
Output vs THD+N VDD=3.6 RL=8+30H
THD+N [%]
1 0.1 0.01 0.001 0.01 0.1 Output[W] 1 10
1 0.1
0.01 0.001 0.01
0.1 Output[W]
1
10
Frequency vs THD+N VDD=5.0V RL=4+30H 100 100
Frequency vs THD+N VDD=5.0V RL=8+30H
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THDN[%] THDN[%] 1
10
10
1
0.1
0.1
0.01
0.01
0.001 10 100 1000 Frequency[Hz] 10000 100000
0.001 10 100 1000 Frequency[Hz] 10000 100000
Frequency vs THD+N VDD=3.6V RL=4+30H 100
100
Frequency vs THD+N VDD=3.6V RL=8+30H
10
10
THDN[%]
0.1
THDN[%]
1
1
0.1
0.01
0.01
0.001 10 100 1000 Frequency[Hz] 10000 100000
0.001 10 100 1000 Frequency[Hz] 10000 100000
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Output vs Efficiency VDD=5.0V RL=4+30H NonClipOFF 100 90 80 70 Efficiency[%] 60 50 40 30 20 10 0 0 500 1000 1500 Output[mW] 2000 2500
Efficiency[%] 100 90 80 70 60 50 40 30 20 10 0 0 200 400 600 800 1000 1200 1400 1600 1800 Output[mW] Output vs Efficiency VDD=5.0V RL=8+30H NonClipOFF
Output vs Efficiency VDD=3.6V RL=4+30H NonClipOFF 100 90 80 70 Efficiency[%] 60 50 40 30 20 10 0 0 200 400 600 800 Output[mW] 1000 1200 1400 1600
Efficiency[%] 100 90 80 70 60 50 40 30 20 10 0 0 200
Output vs Efficiency VDD=3.6V RL=8+30H NonClipOFF
400 Output[mW]
600
800
1000
Power supply voltage vs Maximum output Gain=18dB RL=4+30H 3500 3000 Maximum output [mW] 2500 NonClipOFF NonClip1
Power supply voltage vs Maximum output Gain=18dB RL=8+30H 2500 NonClipOFF NonClip1
2000 Maximum output [mW]
2000 www..com 1500 1000 500 0 2.5 3 3.5 4 Power supply voltage [V] 4.5 5 5.5
1500
1000
500
0 2.5 3 3.5 4 Power supply voltage [V] 4.5 5 5.5
Note) The definition of the maximum output is different in "NonClipOFF" and "NonClip1". NonClipOFF: Output when THD+N=10%. NonClip1: Output when "NonClip" functions.
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YDA145
Frequency vs PSRR VDD=5.0V RL=4+30H 0 -10 -20 -30 PSRR[dB]
Frequency vs PSRR VDD=5.0 RL=8+30H 0 -10 -20 -30 PSRR[dB] -40 -50 -60 -70 -80 -90 -100
-40 -50 -60 -70 -80 -90 -100 10 100 1000 Frequency[Hz] 10000 100000
10
100
1000 Frequency[Hz]
10000
100000
Frequency vs PSRR VDD=3.6V RL=4+30H 0 -10 -20 -30 PSRR[dB]
Frequency vs PSRR VDD=3.6V RL=8+30H 0 -10 -20 -30 PSRR[dB] -40 -50 -60 -70 -80 -90
-40 -50 -60 -70 -80 -90 10 100 1000 Frequency[Hz] 10000 100000
10
100
1000 Frequency[Hz]
10000
100000
Input vs Output VDD=5.0V RL=4+30H NonClipOFF 10 10
Input vs Output VDD=5.0V RL=8+30H NonClipOFF
1 Output [W] Output[W]
1
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0.1
0.1
0.01
0.01
0.001 0.01
0.1 Input[Vrms]
1
10
0.001 0.01
0.1 Input[Vrms]
1
10
Input vs Output VDD=3.6V RL=4+30H NonClipOFF 10 10
Input vs Output VDD=3.6V RL=8+30H NonClipOFF
1 Output [W] Output[W] 0.1 Input[Vrms] 1 10
1
0.1
0.1
0.01
0.01
0.001 0.01
0.001 0.01
0.1 Input[Vrms]
1
10
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Input vs Output VDD=5.0V RL=4+30H NonClip1 10
Input vs Output VDD=5.0V RL=8+30H NonClip1 10
1 Output [W]
1 Output[W]
0.1
0.1
0.01
0.01
0.001 0.01
0.1 Input[Vrms]
1
10
0.001 0.01
0.1 Input[Vrms]
1
10
Input vs Output VDD=3.6V RL=4+30H NonClip1 10
Input vs Output VDD=3.6V RL=8+30H NonClip1 10
1 Output [W]
1 Output[W]
0.1
0.1
0.01
0.01
0.001 0.01
0.1 Input[Vrms]
1
10
0.001 0.01
0.1 Input[Vrms]
1
10
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Package Outline
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Notice
The specifications of this product are subject to improvement changes without prior notice.

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